CHAPTER 1: ASIC DESIGN METHODOLOGY - Traditional Design Flow (Specification and RTL Coding, Dynamic Simulation, Constraints, Synthesis and Scan Insertion, Formal Verification, Static Timing Analysis using PrimeTime, Placement, Routing and Verification, Engineering Change Order), Physical Compiler Flow.
CHAPTER 2: TUTORIAL - Traditional Flow (Pre-Layout Steps, Post-Layout Steps), Physical Compiler Flow.
CHAPTER 3: BASIC CONCEPTS - Synopsys Products, Synthesis Environment (Startup Files, System Library Variables). Objects, Variables and Attributes, Finding Design Objects, Synopsys Formats, Data Organization, Design Entry, Compiler Directives (HDL, VHDL).
CHAPTER 4: SYNOPSYS TECHNOLOGY LIBRARY - Technology Libraries (Logic & Physical Library), Delay Calculation.
CHAPTER 5: PARTITIONING AND CODING STYLES - Partitioning for Synthesis, RTL, General Guidelines, Logic Inference, Order Dependency.
CHAPTER 6: CONSTRAINING DESIGNS - Environment and Constraints, Clocking Issues (Pre-Layout, Post-Layout).
CHAPTER 7: OPTIMIZING DESIGNS - Design Space Exploration, Total Negative Slack, Compilation Strategies (Top-Down Hierarchical Compile, Time-Budgeting Compile, Compile-Characterize-Write-Script-Recompile, Design Budgeting), Resolving Multiple Instances, Optimization Techniques, Flattening, Compiling the Design and Structuring, Removing Hierarchy, Optimizing Clock Networks, Optimizing for Area).
CHAPTER 8: DESIGN FOR TEST - Types of DFT, Scan Insertion, DFT Guidelines.
CHAPTER 9: LINKS TO LAYOUT & POST LAYOUT OPT - Generating Netlist for Layout, Layout (Floorplanning, Clock Tree Insertion, Transfer of Clock Tree to Design Compiler, Routing, Extraction), Post-Layout Optimization (Back Annotation and Custom Wire Loads, In-Place Optimization, Fixing Hold-Time Violations).
CHAPTER 10: PHYSICAL SYNTHESIS - Modes of Operation, Other PhyC Commands, Physical Compiler Issues, Back-End Flow.
CHAPTER 11: SDF GENERATION - SDF File Generation (Generating Pre-Layout SDF File, Generating Post-Layout SDF File, False Delay Calculation Problem).
CHAPTER 12: PRIMETIME BASICS - Introduction (Invoking PT, PrimeTime Environment, Automatic Command Conversion), Basics, PrimeTime Commands.
CHAPTER 13: STATIC TIMING ANALYSIS - Why Static Timing Analysis?, Timing Exceptions, Disabling Timing Arcs, Environment and Constraints, Pre-Layout Clock Specification, Timing Analysis, Post-Layout Clock Specification, Timing Analysis, Pre-Layout Setup and Hold-Time
Analysis Report, Post-Layout Setup and-Time Analysis Report,
Cell Swapping, Bottleneck Analysis, Clock Gating Checks.
Has this book been updated since the 2nd edition? Good book but a bit out of date.
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